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ISL97671A
PWM Brightness Control Register (0x00)
The Brightness control resolution has 256 steps of PWM duty cycle
adjustment. Figure 29 shows the bit assignment. All of the bits in
this Brightness Control Register can be read or written. Step 0
corresponds to the minimum step where the current is less than
10μA. Steps 1 to 255 represent the linear steps between 0.39% and
100% duty cycle with approximately 0.39% duty cycle adjustment
per step.
Device Control Register (0x01)
This register has two bits that control either SMBus/I 2 C
controlled or external PWM controlled PWM dimming and a
single bit that controls the backlight ON/OFF state. The
remaining bits are reserved. The bit assignment is shown in
Figure 30. All other bits in the Device Control Register will read as
low unless otherwise written.
? All reserved bits have no functional effect when written.
?
An SMBus/I 2 C Write Byte cycle to Register 0x00 sets the PWM
brightness level only if the backlight controller is in SMBus/I 2 C
? All defined control bits return their current, latched value when
read.
mode (see Table 4) Operating Modes selected by Device
Control Register Bits 1 and 2).
? An SMBus/I 2 C Read Byte cycle to Register 0x00 returns the
programmed PWM brightness level.
? An SMBus/I 2 C setting of 0xFF for Register 0x00 sets the
backlight controller to the maximum brightness.
? An SMBus/I 2 C setting of 0x00 for Register 0x00 sets the
backlight controller to the minimum brightness output.
? Default value for Register 0x00 is 0xFF.
A value of 1 written to BL_CTL turns on the backlight in 4ms or less
after the write cycle completes. The backlight is deemed to be on
when Bit 3 BL_STAT of Register 0x02 is 1 and Register 0x09 is not 0.
A value of 0 written to BL_CTL immediately turns off the BL. The
BL is deemed to be off when Bit 3 BL_STAT of Register 0x02 is 0
and Register 0x09 is 0.
The default value for Register 0x01 is 0x00.
REGISTER 0x00
PWM BRIGHTNESS CONTROL REGISTER
BRT7
Bit 7 (R/W)
BRT6
Bit 6 (R/W)
BRT5
Bit 5 (R/W)
BRT4
Bit 4 (R/W)
BRT3
Bit 3 (R/W)
BRT2
Bit 2 (R/W)
BRT1
Bit 1 (R/W)
BRT0
Bit 0 (R/W)
BIT ASSIGNMENT
BRT[7..0]
REGISTER 0x01
BIT FIELD DEFINITIONS
= 256 steps of PWM brightness levels
FIGURE 29. DESCRIPTIONS OF BRIGHTNESS CONTROL REGISTER
DEVICE CONTROL REGISTER
RESERVED
Bit 7 (R/W)
RESERVED
Bit 6 (R/W)
RESERVED
Bit 5 (R/W)
RESERVED
Bit 4 (R/W)
RESERVED
Bit 3 (R/W)
PWM_MD
Bit 2 (R/W)
PWM_SEL
Bit 1 (R/W)
BL_CTL
Bit 0 (R/W)
PWM_MD
X
0
PWM_SEL
X
0
BL_CTL
0
1
MODE
Backlight Off
SMBus/I 2 C and PWM input controlled (DPST)
dimming (Method 3)
1
X
0
1
1
1
SMBus/I 2 C controlled PWM dimming (Method 1)
PWM input controlled PWM dimming (Method 2)
FIGURE 30. DESCRIPTIONS OF DEVICE CONTROL REGISTER
20
FN7709.3
November 30, 2012
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